PeRT3 Phoenix系统
型号:
品牌:力科/Lecroy

BitRate1Gb/sto8.5G...
StepSize100Khz
Rise/FallTime(20-80%)...
VoltageOffset-2Vto+2...

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产品功能介绍

PeRT3 硬件平台

PER-R008-S01-X
PeRT3 Phoenix R8 平台

PER-R008-10U-X
PeRT Phoenix Upgrade to 8G to 10G Requires Unit to be in Serial Number range of above 90xx and 91xx Requires unit to be returned to Factory

 

PeRT3 Test Suite Options

SAS-R006-004-A
Eagle SAS Receiver Test Suite

SAT-R006-004-A
Eagle SATA Receiver Test Suite

PCI-R008-004-A
PCI Express® Gen 1 / Gen 2 / Gen 3 Receiver Test Suite

USB-R008-001-A
USB 3.0 Receiver Tolerance - Phoenix

 

PeRT3附件

PER-AC12-C01-X
SMA pair High End

PER-AC12-M01-X
SMA to SMP pair

PER-AC06-Q01-X
Rise Time Filters

PER-R008-ACS-X
PCIe Gen3 Tx/Rx/LinkEQ test accessories

PER-R008-ISI-X
SATA ISI Board for PeRT3 Phoenix and Eagle

 

Annual Calibration of PeRT3 Systems

PER-CA08-001-C
Annual Calibration of PeRT3 Phoenix 8G System

 

Bundled Warranty and Calibration of PeRT3 Systems

PER-CA08-W01-W
Three Year Warranty and Two Additional Years Calibration for Phoenix 8G 1 Channel System

PER-CA08-WX1-W
Five Year Warranty and Four Additional Years Calibration for Phoenix 8G 1 Channel System

 

新问题的新解决办法

许多下一代高速串行标准,协议层可优化物理层,比如为长且有噪声的传输通道设置合理的发送接收均衡。这需要PeRT3这类新型仪器来执行标准的接收测试,以及在协议层上和发送端进行通信。因此PeRT3可用于集成的发送端和接收端测试,优化测试时间,降低设备数量和连接复杂性。

什么是协议支持能力

带协议支持能力的BERT系统,是能够和被测设备进行协议握手,例如均衡训练,并执行电气特性测量的仪器。

什么是PeRT3

PeRT3结合了BERT系统的物理层测试能力,以及和被测物进行协议握手和训练的能力。

关键特性

·         带协议支持能力的误码率测试仪

·         可用于接收机抖动和容限测试的抖动生成功能。

·         内置3阶去嵌发生器

·         支持协议的发生器和接收机状态机

·         用户可自定义测试脚本,用于抖动容限、均衡优化,搜索和多参数的扫描测试。

·         用户可自定义协议握手和训练的状态机。

Generator Data Out

   

Generator Jitter Stress

Bit Rate

1 Gb/s to 8.5 Gb/s

Random Jitter Source

Step Size

100Khz

10 Khz – 1.5Mhz RMS Jitter

1.2 – 9 pSec RMA

Rise/Fall Time (20-80%)

35 pSec typical

1.5 Mhz- 100Mhz RMA Jitter

1.2 – 12 pSec RMS

Differential Amplitude Range

50mV to 2.2V, 5mV steps

1.5 Mhz – 1000Mhz RMS Jitter

1.2 – 12 pSec RMS

Voltage Offset

-2V to +2V

Sinusoidal Jitter Source

Intrinsic Jitter

12 pSec pp typical with internal clock

10 Khz- 100Khz Jitter

100 – 15000 pSec

De-Emphasis

 

100Khz – 500Khz Jitter

100 – 2000 pSec

# taps

3

0.5 Mhz – 1000Mhz Jitter

0 – 300 pSec

Range

-0.5dB to -9dB

Common Mode Source

Step

0.1dB

100Mhz – 1000Mhz Jitter

50 – 350 mV

SSC Support

23Khz-33Khz

 

Sinusoidal waveform

 

-5000ppm to +5000ppm

Differential Mode Source

 

Triangular/Sinusoidal waveforms

100Mhz – 2500Mhz Jitter

0 – 30 mV

Connector:

K-Type female

 

Sinusoidal waveform

Interface

Differential or single-ended, DC coupled, 50 ohm

External Jitter Injection

Single error inject:

Adds single error on demand

Frequency range

0.5 ~ 100 Mhz

Generator Clock Out

Modulation range

1 ~ 200 pSec

Clock Rate

At rate divided by any integer between 1-255

Input impedance

50 ohms

Duty cycle

40-60%

Amplitude range

60-600 mV

Amplitude

0.1 Vpp-Diff to 2Vpp-Diff

Interface

DC coupled, 50 ohms

Output voltage window

-2V-2V

Connector

SMA female

Interface

Differential or single-ended, DC coupled, 50 ohm

Data In

Connector

SMA female

Data Rates

1 Gb/s to 8.5Gb/s

 

 

Input impedance

50ohms

Protocol Supported

Amplitude range

200 – 1800 mV

PCI Express

2.5, 5 and 8 Gb/s

Clock In

SAS

1.5, 3 and 6 Gb/s

Frequency range

1 Ghz to 8.5 Ghz

SATA

1.5, 3 and 6 Gb/s

Termination

50 ohms

USB3.0

5Gb/s

Amplitude range

600 – 1200 mV

 

Tigger Out

Amplitude range

600 – 800 mV

ISI

External

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